// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.attn_fwd.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_attn_fwd__A0__F250

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 32, "BLOCK_N": 16, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 32, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 64, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 64, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 64, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 64, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 64, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 64, "BLOCK_N": 64, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 128, "BLOCK_N": 64, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 128, "BLOCK_N": 64, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 128, "BLOCK_N": 64, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 128, "BLOCK_N": 64, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 128, "BLOCK_N": 128, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 128, "BLOCK_N": 128, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 256, "BLOCK_N": 64, "PRE_LOAD_V": false, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 256, "BLOCK_N": 64, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw",
  R"xyzw({"PERSISTENT_TYPE": 2, "GRID_CU_MULTIP": 2, "BLOCK_M": 256, "BLOCK_N": 64, "PRE_LOAD_V": true, "NUM_XCDS": 8})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 4, "num_warps": 2, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 2, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 2, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 2, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 2, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 2, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 2, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 2, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 4})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 4})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 4})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
    int8_t  PERSISTENT_TYPE;
    int8_t  GRID_CU_MULTIP;
    int8_t  NUM_XCDS;
    bool    PRE_LOAD_V;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 32, .BLOCK_N = 16, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 32, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 64, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 64, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 128, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 128, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 128, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 128, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 128, .BLOCK_N = 128, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 128, .BLOCK_N = 128, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 256, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = false },
    { .BLOCK_M = 256, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true },
    { .BLOCK_M = 256, .BLOCK_N = 64, .PERSISTENT_TYPE = 2, .GRID_CU_MULTIP = 2, .NUM_XCDS = 8, .PRE_LOAD_V = true }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx950/flash/attn_fwd.zip)xyzw" };
#else
{ R"xyzw(amd-gfx950/flash/attn_fwd.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx950)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0x207858b1u, 0xb9aff5a7u, 2228, 413 }, // 207858b1b9aff5a7 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=4;num_warps=2;num_stages=1;;arch=gfx950
    { 0xbc0a9f59u, 0x34631b27u, 1291, 209 }, // bc0a9f5934631b27 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=2;num_stages=1;;arch=gfx950
    { 0x3345de4bu, 0x0145c012u, 1291, 333 }, // 3345de4b0145c012 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=2;num_warps=2;num_stages=1;;arch=gfx950
    { 0x1732f51bu, 0xce2a1a93u, 1291, 84 }, // 1732f51bce2a1a93 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=3;num_warps=2;num_stages=1;;arch=gfx950
    { 0x20ec7945u, 0xba67b060u, 1291, 413 }, // 20ec7945ba67b060 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=32;BLOCK_N=16;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=4;num_warps=2;num_stages=1;;arch=gfx950
    { 0xa36008b6u, 0x48bd2943u, 1375, 664 }, // a36008b648bd2943 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx950
    { 0xf11177c6u, 0xb5cb9e02u, 1375, 373 }, // f11177c6b5cb9e02 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx950
    { 0xa6c6068bu, 0xb55163c8u, 1460, 664 }, // a6c6068bb55163c8 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx950
    { 0x9f51ba9eu, 0x7d5d0175u, 1460, 373 }, // 9f51ba9e7d5d0175 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=32;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx950
    { 0x35a3cafbu, 0x89917449u, 1544, 664 }, // 35a3cafb89917449 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=64;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx950
    { 0xe2adde27u, 0x4f81d410u, 1544, 373 }, // e2adde274f81d410 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=64;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx950
    { 0xeea7bb5eu, 0x41fc5a7du, 1629, 209 }, // eea7bb5e41fc5a7d = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=64;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=2;num_stages=1;;arch=gfx950
    { 0x40a84b04u, 0x66dc0f92u, 1629, 664 }, // 40a84b0466dc0f92 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=64;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx950
    { 0x44795e2au, 0x9bbe323du, 1629, 333 }, // 44795e2a9bbe323d = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=64;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=2;num_warps=2;num_stages=1;;arch=gfx950
    { 0x935d5b06u, 0x8b0847c6u, 1629, 373 }, // 935d5b068b0847c6 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=64;BLOCK_N=64;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx950
    { 0x1ff5c589u, 0xcc2ba397u, 1713, 209 }, // 1ff5c589cc2ba397 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=128;BLOCK_N=64;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=2;num_stages=1;;arch=gfx950
    { 0x7af71159u, 0x3293d0aau, 1713, 664 }, // 7af711593293d0aa = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=128;BLOCK_N=64;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx950
    { 0x9708c4b1u, 0x316a00f7u, 1799, 664 }, // 9708c4b1316a00f7 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=128;BLOCK_N=64;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx950
    { 0x5334c85au, 0x7fba7e0cu, 1799, 373 }, // 5334c85a7fba7e0c = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=128;BLOCK_N=64;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx950
    { 0xb69da7bcu, 0x3fcb8877u, 1884, 664 }, // b69da7bc3fcb8877 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=128;BLOCK_N=128;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx950
    { 0xfe78d75bu, 0x6ae159ccu, 1971, 664 }, // fe78d75b6ae159cc = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=128;BLOCK_N=128;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx950
    { 0x698d4e4bu, 0x3bb6eb14u, 2057, 876 }, // 698d4e4b3bb6eb14 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=256;BLOCK_N=64;PRE_LOAD_V=False;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=8;num_stages=4;;arch=gfx950
    { 0xab848c22u, 0x31aa4f35u, 2143, 876 }, // ab848c2231aa4f35 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=256;BLOCK_N=64;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=1;num_warps=8;num_stages=4;;arch=gfx950
    { 0xbb18f504u, 0x56aefc52u, 2143, 916 }, // bb18f50456aefc52 = b2sum -l 64 <<< amd-gfx950/flash/attn_fwd.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;PADDED_HEAD=True;ENABLE_DROPOUT=False;CAUSAL_TYPE=3;BIAS_TYPE=0;;#P;PERSISTENT_TYPE=2;GRID_CU_MULTIP=2;BLOCK_M=256;BLOCK_N=64;PRE_LOAD_V=True;NUM_XCDS=8;;#CO;waves_per_eu=2;num_warps=8;num_stages=4;;arch=gfx950
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::attn_fwd_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               attn_fwd_packed_string);

static int8_t lut[1][10][10] =
{
// GPU gfx950_mod0
{{ 3, 1, 4, 3, 2, 4, 4, 2, 2, 4},
 { 3, 3, 2, 8, 8, 1, 4, 1, 3, 3},
 { 2, 1,12, 9,10,14,12,12,10, 9},
 { 2, 3,12,14,14,12,12,12,14, 9},
 { 2, 7, 9,13,13,12,13,14,13,13},
 { 0, 8,14,13,11,20,20,13,20,13},
 { 5, 6,17,17,20,20,20,20,20,20},
 {18, 6,17,20,20,20,20,20,20,20},
 {22,22,15,17,19,20,19,20,20,20},
 {23,23,16,17,20,19,19,20,23,21}}
// End of GPU gfx950_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::AttnFwdContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(AttnFwdContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_attn_fwd__A0__F250 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(attn_fwd__lut_lambda__0(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = attn_fwd__lut_lambda__0(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 8;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.PERSISTENT_TYPE = perf.PERSISTENT_TYPE;
    context.GRID_CU_MULTIP = perf.GRID_CU_MULTIP;
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    context.PRE_LOAD_V = perf.PRE_LOAD_V;
    context.NUM_XCDS = perf.NUM_XCDS;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*bf16:16"
// Sm_scale = "fp32"
// L = "*fp32:16"
// Q_descale = 0
// stride_bz = 0
// stride_bh = 0
// stride_bm = 0
// stride_az = 0
// Num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// BLOCK_DMODEL = 64
// Hdim_qk = "i32"
// PADDED_HEAD = True
// ENABLE_DROPOUT = False
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// RETURN_ENCODED_SOFTMAX = False
// CAUSAL_TYPE = 3
// Window_left = "i32"
// Window_right = "i32"
// BIAS_TYPE = 0
// USE_ALIBI = False
// INT8 = False
// persistent_atomic_counter = "*i32"
// Num_CU = "i32"

// ('SELECT * FROM FLASH$attn_fwd WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$PADDED_HEAD = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$CAUSAL_TYPE = ? AND inputs$BIAS_TYPE = ?', ['gfx950_mod0', 'torch.bfloat16', 64, False, False, 3, 0])

// vim: set fileencoding=utf-8

