// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.bwd_kernel_dq.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_bwd_kernel_dq__A8__F24

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
    int8_t  NUM_XCDS;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx115x/flash/bwd_kernel_dq.zip)xyzw" };
#else
{ R"xyzw(amd-gfx115x/flash/bwd_kernel_dq.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1153)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0xdb1bdc2cu, 0x7a1a98aeu, 650, 292 }, // db1bdc2c7a1a98ae = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xab87b7d2u, 0x77dab53du, 650, 723 }, // ab87b7d277dab53d = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1153
    { 0x6d4d457au, 0xe5f9ddf6u, 650, 438 }, // 6d4d457ae5f9ddf6 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1153
    { 0x1964c3e5u, 0xd507ae2bu, 843, 292 }, // 1964c3e5d507ae2b = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xcf44f37fu, 0x9e566251u, 843, 683 }, // cf44f37f9e566251 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1153
    { 0x384a81d3u, 0x4fefd685u, 843, 398 }, // 384a81d34fefd685 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xf4eb9a66u, 0x52dce3a4u, 843, 478 }, // f4eb9a6652dce3a4 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xc043cc26u, 0x2aeb4b78u, 518, 292 }, // c043cc262aeb4b78 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xa1df367fu, 0x4ef88649u, 518, 398 }, // a1df367f4ef88649 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1153
    { 0x0a90dc6eu, 0x4c05432fu, 518, 478 }, // 0a90dc6e4c05432f = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xc4626074u, 0xc39e7c97u, 518, 438 }, // c4626074c39e7c97 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xef479290u, 0x313f77a8u, 551, 292 }, // ef479290313f77a8 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1153
    { 0x709f198bu, 0x2b8ebf36u, 584, 292 }, // 709f198b2b8ebf36 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1153
    { 0x98e54804u, 0xbc68cfe8u, 584, 683 }, // 98e54804bc68cfe8 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1153
    { 0x4fc7f06au, 0x72e3b62bu, 584, 398 }, // 4fc7f06a72e3b62b = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xf4efd59cu, 0x4ced9ac6u, 584, 723 }, // f4efd59c4ced9ac6 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1153
    { 0xfd6410ecu, 0x0cc0da01u, 584, 478 }, // fd6410ec0cc0da01 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1153
    { 0xf9f99cd5u, 0xf18d91d4u, 584, 438 }, // f9f99cd5f18d91d4 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1153
    { 0x82ccd813u, 0xa8dfa7e4u, 584, 803 }, // 82ccd813a8dfa7e4 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=8;num_stages=1;;arch=gfx1153
    { 0x6067f4ebu, 0xb41d9310u, 617, 292 }, // 6067f4ebb41d9310 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1153
    { 0x1594b1ebu, 0x042a9858u, 617, 683 }, // 1594b1eb042a9858 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1153
    { 0xe9372defu, 0xed44cd0cu, 617, 398 }, // e9372defed44cd0c = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1153
    { 0x7dbd2160u, 0x94cded8eu, 617, 478 }, // 7dbd216094cded8e = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1153
    { 0x4153e2cbu, 0xb46f750cu, 617, 763 }, // 4153e2cbb46f750c = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=8;num_stages=1;;arch=gfx1153
    { 0x39df1552u, 0x7201f374u, 617, 438 }, // 39df15527201f374 = b2sum -l 64 <<< amd-gfx115x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1153
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::bwd_kernel_dq_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               bwd_kernel_dq_packed_string);

static int8_t lut[1][8][8] =
{
// GPU gfx1153_mod0
{{ 7, 4, 6, 4, 6, 6, 9, 5},
 { 0,13,15,15, 7,13,13,18},
 { 1, 9,23,22,20, 7, 7,10},
 { 2,10,10,21, 9, 7, 7, 7},
 { 3,17, 8, 7,24,19,22,24},
 { 6, 7,16,19,19,19,19,19},
 { 9,14,16,17,14,19,19,19},
 {11,14,16,17,12,17,17,19}}
// End of GPU gfx1153_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::BwdKernelDqContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(BwdKernelDqContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_bwd_kernel_dq__A8__F24 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(bwd_kernel_dq__lut_lambda__1(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = bwd_kernel_dq__lut_lambda__1(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 4;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    context.NUM_XCDS = perf.NUM_XCDS;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*fp16:16"
// sm_scale = "fp32"
// L = "*fp32:16"
// D = "*fp32:16"
// stride_bz = 0
// stride_bh = 0
// stride_bm = 0
// stride_dbz = 0
// stride_dbh = 0
// stride_dbm = 0
// num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// num_seqlens = "i32"
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// Window_left = "i32"
// Window_right = "i32"
// BLOCK_DMODEL = 32
// CAUSAL_TYPE = 3
// ENABLE_DROPOUT = False
// PADDED_HEAD = False
// BIAS_TYPE = 0

// ('SELECT * FROM FLASH$bwd_kernel_dq WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$CAUSAL_TYPE = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$PADDED_HEAD = ? AND inputs$BIAS_TYPE = ?', ['gfx1100_mod0', 'torch.float16', 32, 3, False, False, 0])

// vim: set fileencoding=utf-8

