// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.bwd_kernel_fuse.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_bwd_kernel_fuse__A9__F42

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 16, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 16 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 32, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 16 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 32 },
    { .BLOCK_M = 64, .BLOCK_N = 64 }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx120x/flash/bwd_kernel_fuse.zip)xyzw" };
#else
{ R"xyzw(amd-gfx120x/flash/bwd_kernel_fuse.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1201)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0xa54bc9d5u, 0x0c7461feu, 328, 350 }, // a54bc9d50c7461fe = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x841299abu, 0x6e5ef6aau, 328, 164 }, // 841299ab6e5ef6aa = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1201
    { 0xaef2d633u, 0xdf8b72bbu, 328, 244 }, // aef2d633df8b72bb = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x66251b84u, 0x5130578eu, 328, 390 }, // 66251b845130578e = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1201
    { 0xf5c9eca6u, 0x8d593985u, 0, 390 }, // f5c9eca68d593985 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x41558562u, 0x406fd093u, 430, 350 }, // 41558562406fd093 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x286a4404u, 0x70dbac10u, 430, 164 }, // 286a440470dbac10 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x53e64dc1u, 0x986dd0a7u, 430, 244 }, // 53e64dc1986dd0a7 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1201
    { 0xb78fcc19u, 0xbb699596u, 430, 390 }, // b78fcc19bb699596 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x32ba21f3u, 0x048ab407u, 102, 350 }, // 32ba21f3048ab407 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x72f799ddu, 0x1d2057f1u, 102, 164 }, // 72f799dd1d2057f1 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x532d8315u, 0xd09d7fe1u, 102, 244 }, // 532d8315d09d7fe1 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1201
    { 0xbefe6fe9u, 0x0c49d58au, 102, 390 }, // befe6fe90c49d58a = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x7d9a8cdeu, 0x7e1fcdadu, 284, 350 }, // 7d9a8cde7e1fcdad = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x3a111e8au, 0xc670c941u, 284, 164 }, // 3a111e8ac670c941 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x74a3697au, 0x8b692edeu, 284, 244 }, // 74a3697a8b692ede = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x686791bau, 0xe8739d1bu, 284, 390 }, // 686791bae8739d1b = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1201
    { 0x1d5e8129u, 0x28ad7b10u, 306, 350 }, // 1d5e812928ad7b10 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_fuse.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=48;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=True;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1201
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::bwd_kernel_fuse_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               bwd_kernel_fuse_packed_string);

static int8_t lut[1][10][10] =
{
// GPU gfx1201_mod0
{{ 1, 3, 8, 2, 0, 0, 1, 0, 6, 7},
 { 5, 5, 7, 6, 5, 6, 4, 6, 7, 5},
 {11,12,11,10,11, 6,10, 7, 5, 8},
 {11,11,10,11,10,11,10, 5, 8, 7},
 {11,11,11,11,15,11,12, 7, 8, 8},
 {12,11,10,10,10,14,13,16, 8, 8},
 {10,10,12,15,15,14,16,13,13,16},
 {10, 9,11,16,16,15,13,14,13,17},
 {12,11, 9,15,14,14,14,17,17,17},
 {12,11,11,16,16,14,14,17,17,17}}
// End of GPU gfx1201_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::BwdKernelFuseContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(BwdKernelFuseContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_bwd_kernel_fuse__A9__F42 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(bwd_kernel_fuse__lut_lambda__0(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = bwd_kernel_fuse__lut_lambda__0(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 4;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*fp16:16"
// sm_scale = "fp32"
// L = "*fp32:16"
// stride_bz = 0
// stride_bh = 0
// stride_bm = 0
// stride_dbz = 0
// stride_dbh = 0
// stride_dbm = 0
// num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// num_seqlens = "i32"
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// Window_left = "i32"
// Window_right = "i32"
// BLOCK_DMODEL = 48
// CAUSAL_TYPE = 3
// ENABLE_DROPOUT = False
// PADDED_HEAD = True
// BIAS_TYPE = 0

// ('SELECT * FROM FLASH$bwd_kernel_fuse WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$CAUSAL_TYPE = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$PADDED_HEAD = ? AND inputs$BIAS_TYPE = ?', ['gfx1201_mod0', 'torch.float16', 48, 3, False, False, 0])

// vim: set fileencoding=utf-8

