// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.bwd_kernel_dq.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_bwd_kernel_dq__A3__F24

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
    int8_t  NUM_XCDS;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx110x/flash/bwd_kernel_dq.zip)xyzw" };
#else
{ R"xyzw(amd-gfx110x/flash/bwd_kernel_dq.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1102)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0x1559d0beu, 0xafbfc164u, 650, 292 }, // 1559d0beafbfc164 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x590b20bau, 0xbb63535au, 650, 723 }, // 590b20babb63535a = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1102
    { 0x15123f3bu, 0x6d70c4b7u, 650, 438 }, // 15123f3b6d70c4b7 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x96caf379u, 0x76e37a81u, 843, 292 }, // 96caf37976e37a81 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1102
    { 0xf82aa4beu, 0xe56d18b9u, 843, 683 }, // f82aa4bee56d18b9 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1102
    { 0x746acb3au, 0x76e8e4fcu, 843, 398 }, // 746acb3a76e8e4fc = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x12be8ac5u, 0x5945bb4du, 843, 478 }, // 12be8ac55945bb4d = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x247ddd39u, 0x23103fddu, 518, 292 }, // 247ddd3923103fdd = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x8fc6605cu, 0x58ba34e0u, 518, 398 }, // 8fc6605c58ba34e0 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x0488a319u, 0x5c97befau, 518, 478 }, // 0488a3195c97befa = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1102
    { 0xb25e7686u, 0xa905c70cu, 518, 438 }, // b25e7686a905c70c = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1102
    { 0xc6723672u, 0x404c6995u, 551, 292 }, // c6723672404c6995 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x6ab8b777u, 0x8417beecu, 584, 292 }, // 6ab8b7778417beec = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x81203296u, 0xf31e6326u, 584, 683 }, // 81203296f31e6326 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1102
    { 0x6cb4a56eu, 0x3c549c1au, 584, 398 }, // 6cb4a56e3c549c1a = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x32fd5b40u, 0x38aa82a5u, 584, 723 }, // 32fd5b4038aa82a5 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1102
    { 0x2fd183c4u, 0xa7f7ff59u, 584, 478 }, // 2fd183c4a7f7ff59 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x708245c9u, 0xef8a7033u, 584, 438 }, // 708245c9ef8a7033 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x169e3e2fu, 0x2edcd3e3u, 584, 803 }, // 169e3e2f2edcd3e3 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=8;num_stages=1;;arch=gfx1102
    { 0xe09301c5u, 0x8cb9e26bu, 617, 292 }, // e09301c58cb9e26b = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1102
    { 0x1449cf26u, 0x7514a64bu, 617, 683 }, // 1449cf267514a64b = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1102
    { 0x725d33c7u, 0x45e694f5u, 617, 398 }, // 725d33c745e694f5 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1102
    { 0xfafe554bu, 0xae618111u, 617, 478 }, // fafe554bae618111 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1102
    { 0xe01d4d17u, 0xba9202d9u, 617, 763 }, // e01d4d17ba9202d9 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=8;num_stages=1;;arch=gfx1102
    { 0x2b877831u, 0xa97e4d30u, 617, 438 }, // 2b877831a97e4d30 = b2sum -l 64 <<< amd-gfx110x/flash/bwd_kernel_dq.zip;;#F;Q='*fp16:16';BLOCK_DMODEL=32;CAUSAL_TYPE=3;ENABLE_DROPOUT=False;PADDED_HEAD=False;BIAS_TYPE=0;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1102
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::bwd_kernel_dq_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               bwd_kernel_dq_packed_string);

static int8_t lut[1][8][8] =
{
// GPU gfx1102_mod0
{{ 7, 4, 6, 4, 6, 6, 9, 5},
 { 0,13,15,15, 7,13,13,18},
 { 1, 9,23,22,20, 7, 7,10},
 { 2,10,10,21, 9, 7, 7, 7},
 { 3,17, 8, 7,24,19,22,24},
 { 6, 7,16,19,19,19,19,19},
 { 9,14,16,17,14,19,19,19},
 {11,14,16,17,12,17,17,19}}
// End of GPU gfx1102_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::BwdKernelDqContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(BwdKernelDqContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_bwd_kernel_dq__A3__F24 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(bwd_kernel_dq__lut_lambda__1(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = bwd_kernel_dq__lut_lambda__1(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 4;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    context.NUM_XCDS = perf.NUM_XCDS;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*fp16:16"
// sm_scale = "fp32"
// L = "*fp32:16"
// D = "*fp32:16"
// stride_bz = 0
// stride_bh = 0
// stride_bm = 0
// stride_dbz = 0
// stride_dbh = 0
// stride_dbm = 0
// num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// num_seqlens = "i32"
// dropout_p = 0
// philox_seed_ptr = 0
// philox_offset2 = 0
// Window_left = "i32"
// Window_right = "i32"
// BLOCK_DMODEL = 32
// CAUSAL_TYPE = 3
// ENABLE_DROPOUT = False
// PADDED_HEAD = False
// BIAS_TYPE = 0

// ('SELECT * FROM FLASH$bwd_kernel_dq WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$CAUSAL_TYPE = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$PADDED_HEAD = ? AND inputs$BIAS_TYPE = ?', ['gfx1100_mod0', 'torch.float16', 32, 3, False, False, 0])

// vim: set fileencoding=utf-8

