// Copyright © 2023-2025 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: MIT

#include "../shim.bwd_kernel_dq.h"
#include <aotriton/_internal/triton_kernel.h>
#include <aotriton/_internal/kernel_cluster.h>
#include <aotriton/_internal/log.h>
#include <aotriton/cpp_tune.h>
#include <assert.h>
#include <string_view>

#define CURRENT_ENTRY_PUBLIC Autotune_bwd_kernel_dq__A10__F245

#define ARRAY_SIZE(array)  (sizeof(array) / sizeof(array[0]))

namespace { // Anonymous namespace

using namespace std::literals::string_view_literals;

#if AOTRITON_BUILD_FOR_TUNING
// PSels and Copts in JSON String
static const char* kernel_psels[] = {
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 16, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 32, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 16, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 32, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw",
  R"xyzw({"BLOCK_M": 64, "BLOCK_N": 64, "NUM_XCDS": 1})xyzw"
};
static const char* kernel_copts[] = {
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 2, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 4, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 4, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 1, "num_warps": 8, "num_stages": 1})xyzw",
  R"xyzw({"waves_per_eu": 3, "num_warps": 8, "num_stages": 1})xyzw"
};
#endif

struct PerfFields {
  int16_t BLOCK_M;
    int16_t BLOCK_N;
    int8_t  NUM_XCDS;
};

static PerfFields image_perf_list [] = {
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 16, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 32, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 16, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 32, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 },
    { .BLOCK_M = 64, .BLOCK_N = 64, .NUM_XCDS = 1 }
};

// u8R generates char8_t which is poorly supported almost everywhere.
// TODO: deduplicate FLATZIP_PATH via shim.cc packed_string
constexpr pstring_view FLATZIP_PATH
#if defined(_WIN32)
{ LR"xyzw(amd-gfx120x/flash/bwd_kernel_dq.zip)xyzw" };
#else
{ R"xyzw(amd-gfx120x/flash/bwd_kernel_dq.zip)xyzw" };
#endif
constexpr std::string_view FUNC_NAME   { R"xyzw(Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1)xyzw"   };
constexpr std::string_view ARCH_NAME { R"xyzw(gfx1200)xyzw" };

// Checksum can be confirmed with `echo -n '<string>' | b2sum -l 64`
// For example:
//   $ echo -n 'amd-gfx110x/flash/attn_fwd/FONLY__^bf16@16,128,False,False,0,0___gfx1100__P__32_32_0_2_False__CO__wave3_warp2_stg1-Gpu-gfx1100' | b2sum -l 64
//   c4b51ee645d79580  -
static AOTRITON_NS::TritonKernelCompactMeta meta_list[] = {
    { 0xda924701u, 0x59d61b6fu, 650, 398 }, // da92470159d61b6f = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x21fa9c6du, 0x69bf8f4cu, 650, 478 }, // 21fa9c6d69bf8f4c = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=16;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x9537a14bu, 0x315238fbu, 843, 292 }, // 9537a14b315238fb = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x2765e0a6u, 0xf8a4969fu, 518, 292 }, // 2765e0a6f8a4969f = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xb6e77491u, 0x8e2b941du, 518, 683 }, // b6e774918e2b941d = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0xbbb25922u, 0x48facd12u, 518, 398 }, // bbb2592248facd12 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x14901567u, 0x5a003dacu, 518, 478 }, // 149015675a003dac = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x26f62202u, 0x8501d898u, 518, 438 }, // 26f622028501d898 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=32;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xc8af48b0u, 0x053b2881u, 551, 292 }, // c8af48b0053b2881 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x6aca0412u, 0xa8fefe09u, 551, 398 }, // 6aca0412a8fefe09 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xca834643u, 0xc1d5deb7u, 551, 723 }, // ca834643c1d5deb7 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x8f07585au, 0xd5b38459u, 551, 478 }, // 8f07585ad5b38459 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x4fad4dcfu, 0x1e867021u, 551, 438 }, // 4fad4dcf1e867021 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=16;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xb135d85fu, 0xa8c420ccu, 584, 292 }, // b135d85fa8c420cc = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xa696722au, 0x717cafe2u, 584, 683 }, // a696722a717cafe2 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x9e0425b8u, 0xa754c161u, 584, 398 }, // 9e0425b8a754c161 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=2;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x31fc1c9au, 0x9dadb5e3u, 584, 478 }, // 31fc1c9a9dadb5e3 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x43ffd31au, 0x823d6bf2u, 584, 438 }, // 43ffd31a823d6bf2 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=32;NUM_XCDS=1;;#CO;waves_per_eu=4;num_warps=4;num_stages=1;;arch=gfx1200
    { 0xdcbc42bau, 0xb77587beu, 617, 292 }, // dcbc42bab77587be = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=4;num_stages=1;;arch=gfx1200
    { 0x6c16a066u, 0x8d0a9eb0u, 617, 683 }, // 6c16a0668d0a9eb0 = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=1;num_warps=8;num_stages=1;;arch=gfx1200
    { 0x113d556bu, 0xc8e645aau, 617, 763 }, // 113d556bc8e645aa = b2sum -l 64 <<< amd-gfx120x/flash/bwd_kernel_dq.zip;;#F;Q='*bf16:16';BLOCK_DMODEL=64;CAUSAL_TYPE=0;ENABLE_DROPOUT=True;PADDED_HEAD=False;BIAS_TYPE=1;;#P;BLOCK_M=64;BLOCK_N=64;NUM_XCDS=1;;#CO;waves_per_eu=3;num_warps=8;num_stages=1;;arch=gfx1200
};

static constexpr int kTotalNumKernels = ARRAY_SIZE(meta_list);

using AOTRITON_NS::v3::flash::autotune::bwd_kernel_dq_packed_string;

static AOTRITON_NS::TritonKernelCluster<kTotalNumKernels>
kernel_cluster(meta_list,
               bwd_kernel_dq_packed_string);

static int8_t lut[1][10][10] =
{
// GPU gfx1200_mod0
{{ 2, 5, 6, 5, 5, 6, 3, 5, 6, 5},
 {10,14,15, 5, 3, 6, 7, 6, 6, 3},
 { 3, 1, 5, 5, 5, 6, 5, 3, 3, 3},
 { 5, 0, 5, 5, 7, 7, 6, 3, 6, 7},
 { 5, 2, 6, 3, 7, 7, 3, 6, 5, 6},
 { 8,11,12, 6, 3, 5, 3, 6, 3, 6},
 { 9, 8,11, 8,12, 5, 7,20, 3,18},
 { 8, 9,12,11,12,16,13,20, 3, 4},
 {11,12,12,13,15, 6, 6,19, 5, 6},
 {11, 8,12,11,16, 3,13,17,18, 6}}
// End of GPU gfx1200_mod0
}
;

}; // End of anonymous namespace

namespace AOTRITON_NS::v3::flash::autotune {

// using AOTRITON_NS::v2::flash::BwdKernelDqContext;

// Returns the selected kernel_index, or -1 when no valid kernel was selected.
// The kernel_index is logged by the caller (lookup_optimal in shim.cc) so the
// AOTRITON_LOG machinery is not duplicated across every generated autotune TU.
int CURRENT_ENTRY_PUBLIC(BwdKernelDqContext& context, int mod_number) {
#if AOTRITON_BUILD_FOR_TUNING
    constexpr int kLutInTuningModeAlwaysReturnZero = 0;
    AOTRITON_LOG(LOG_DEBUG,
                 "Autotune_bwd_kernel_dq__A10__F245 "
                 "kTotalNumKernels = %d _has_preferred_kernel = %d",
                 kTotalNumKernels, context._has_preferred_kernel);
#ifndef NDEBUG
    assert(bwd_kernel_dq__lut_lambda__0(*context.params, mod_number, lut) == kLutInTuningModeAlwaysReturnZero);
#endif
    int preferred = context._has_preferred_kernel;
    int kernel_index = preferred < 0 ? kLutInTuningModeAlwaysReturnZero : preferred;
#else
    auto kernel_index = bwd_kernel_dq__lut_lambda__0(*context.params, mod_number, lut);
#endif
    if (kernel_index < 0 || kernel_index >= kTotalNumKernels) {
        return -1;
    }
    context.kernel_on_device = kernel_cluster.get(kernel_index);
    context.pp_args_index = 3;
    context.flatzip_path = FLATZIP_PATH;
    // aks2_entry IS the func_name (supplied by f.unified_signature)
    context.aks2_entry   = FUNC_NAME;
    context.func_name = FUNC_NAME;
    context.arch_name = ARCH_NAME;
#if AOTRITON_BUILD_FOR_TUNING
    context._total_number_of_kernels = kTotalNumKernels;
    context._preferred_kernel_psels = kernel_psels[kernel_index];
    context._preferred_kernel_copts = kernel_copts[kernel_index];
#endif
    const auto& perf = image_perf_list[kernel_index];
    context.BLOCK_M = perf.BLOCK_M;
    context.BLOCK_N = perf.BLOCK_N;
    context.NUM_XCDS = perf.NUM_XCDS;
    return kernel_index;
}

#undef CURRENT_ENTRY_PUBLIC
}

// Human-readable Signature 
// Q = "*bf16:16"
// sm_scale = "fp32"
// L = "*fp32:16"
// D = "*fp32:16"
// num_head_q = "i32"
// cu_seqlens_q = "*i32:16"
// num_seqlens = "i32"
// dropout_p = "fp32"
// philox_seed_ptr = "*u64"
// philox_offset2 = "u64"
// Window_left = 0
// Window_right = 0
// BLOCK_DMODEL = 64
// CAUSAL_TYPE = 0
// ENABLE_DROPOUT = True
// PADDED_HEAD = False
// BIAS_TYPE = 1

// ('SELECT * FROM FLASH$bwd_kernel_dq WHERE gpu IN (?) AND inputs$Q_dtype = ? AND inputs$BLOCK_DMODEL = ? AND inputs$CAUSAL_TYPE = ? AND inputs$ENABLE_DROPOUT = ? AND inputs$PADDED_HEAD = ? AND inputs$BIAS_TYPE = ?', ['gfx1201_mod0', 'torch.bfloat16', 64, 0, True, False, 1])

// vim: set fileencoding=utf-8

